1. Field of Use
The present invention relates to processing interrupt signals in a data processing system.
2. Prior Art
It is well known to provide storage locations reserved for program status words and exchanging these program status words when an interrupt signal is received from peripheral device. For the most part, most systems include a microprogram processor in order to provide a high degree of flexibility and economy. Normally in this type of system, the processor responds to an interrupt signal and utilizes system software to acknowledge the interrupt, identify the device and take the appropriate action. Of course, this operation has been found to be relatively time consuming and requiring an assigned amount of memory for storing status and routines particularly when the system is required to service a large number of devices.
Additionally, systems of this type have provided for processing interrupts caused by either external peripheral devices or processor simulated external devices through the use of a microroutine contained within the processor's read only memory. While this reduces processing time, the arrangement has not been found suitable where there is a large number of peripheral devices since the microroutine would still require repeated execution to ascertain the interrupt status of each one of the plurality of devices particularly when they are connected to share a common bus and common interrupt facilities.
Accordingly, it is a primary object of the present invention to provide an improved system for processing interrupt signals from a plurality of peripheral control elements.
It is a more specific object of the present invention to provide a system included within a host processor for processing interrupt signals from any one of a number of buses of a target system which a plurality of peripheral control elements share a common interrupt signal line.